Keynotes

Keynote #1 Low-Complexity Hardware Solutions for Baseband Algorithms in Massive MIMO Systems

Mojtaba Mahdavi
Ericsson Research, Sweden

Abstract: As mobile communication systems have evolved through five generations, we have witnessed an exponential increase in data rates, network capacity, and computational demands—trends that are expected to accelerate with the emergence of 6G. This growth is driven by an explosion in connected devices, vast data volumes, and the increasing need for ultra-high throughput, low latency, and enhanced reliability. Moreover, emerging applications such as virtual reality (VR), autonomous vehicles, smart cities, and e-health are imposing even stricter performance requirements for future wireless networks.

Central to the 5G standard is the adoption of massive multiple-input multiple-output (MIMO) technology, which equips base stations with a large number of antennas to serve multiple users simultaneously on the same frequency-time resources. While massive MIMO significantly enhances spectral efficiency and network performance, it also introduces significant computational complexity and memory overhead—primarily due to the need to process and store high-dimensional matrices such as channel state information (CSI). Meeting these challenges is becoming increasingly difficult for conventional digital baseband processors, which face limitations from the slowing of Moore’s Law, constrained memory bandwidth, and energy-intensive data transfers between memory and compute units. These issues hinder the scalability and efficiency of next-generation 6G systems.

This keynote will explore hardware-efficient and low-complexity approaches for implementing baseband signal processing algorithms, focusing on novel computing paradigms that move beyond traditional architectures. In particular, it will highlight the potential of in-memory computing (IMC) as a promising solution to alleviate memory bottlenecks and reduce power consumption. Using practical examples from baseband processing, we will demonstrate how IMC-based architectures can help reshape the future of wireless signal processing and pave the way for realizing the full capabilities of 5G and 6G networks.

Biography: Mojtaba Mahdavi received his M.Sc. degree in Electrical Engineering from Sharif University of Technology, Tehran, Iran, in 2010, and his Ph.D. in Electrical and Information Technology (EIT) from Lund University, Sweden, in 2021. His Ph.D. research focused on baseband processing for 5G and beyond, specifically on algorithms, VLSI architectures, and co-design for next-generation wireless communication systems. In 2020, he was a Visiting Researcher at the Division of Microelectronic Systems Design at the University of Kaiserslautern, Germany. In 2021, Mojtaba joined Ericsson Research in Lund, Sweden, where he currently works as a Senior Researcher in the Device Platform Research group. He has authored several patent applications, as well as journal and conference papers, with a particular emphasis on the hardware implementation of algorithms and architectures for wireless communication systems.

Keynote #2 Marvell’s Accelerated Infrastructure for AI Data Center

Quang-Dam Le
General Director, Marvell, Vietnam

Abstract: This presentation explores Marvell’s Accelerated Infrastructure for AI, featuring cutting-edge solutions that redefine data center infrastructure with custom compute offerings, including AI inference accelerators, as well as advanced interconnects like 3D SiPho engines and Teralynx 10 51.2T products. These solutions enable high-bandwidth connectivity, low power, low latency, and reliable data movement, leveraging technologies such as PAM4 DSPs (Alaska 1.6T, Nova, and Spica), PCIe Retimers (Alaska PCIe Gen 6 and Gen 7 SerDes), Ethernet Network Switches (Teralynx), and Compute Express Link (CXL) Devices. Brief overview of advanced package technology will also be described to demonstrate how the state-of-art Integrated Circuit (IC) can be designed. We highlight our partnerships with industry leaders like NVIDIA, AMD, and Micron, driving innovation and ecosystem expansion, as well as our UALink scale-up solution for efficient AI infrastructure scaling. A glance at Marvell Vietnam, the third largest R&D center of global Marvell, is quickly shown to demonstrate its important role in Marvell strategy for the future of AI infrastructure and data center technology.

Biography: Lê Quang Đạm (nicknamed QD) joined Marvell in 2011, and held different positions such as Technical Director, Senior Director, Associate Vice President, and presently, he is the General Director of Marvell Technology Vietnam. He was graduated with a Bachelor of Science (B.Sc.) degree from Ho Chi Minh City University of Science (HCMUS) in 1988, a Master (MSc.) degree in Physics in Canada in 1993 , and a Doctorate (Ph.D.) degree in Signal Processing (Artificial Intelligence) in Canada in 1996, before starting his career in the semiconductor industry.

QD began his career as an algorithm designer for all Digital Signal Processing (DSP) IPs for Miranda Technologies, thereafter Gennum Corporation as Senior Video System Architect, and went on to join ATI Technologies Inc (acquired later by Advanced Micro Devices - AMD) as Senior Manager to manage the DSP teams, responsible for Markham (Canada), Bangalore (India), Shanghai (China) and Munich (Germany). Just prior to Marvell, he was a Senior Principal Scientist with Broadcom. He has strong interest in System Architecture, Signal Processing and Artificial Intelligence.

Keynote #3: Bi-static Sensing in 6G Perceptive Mobile Networks

Andrew Zhang
University of Technology Sydney

Abstract: Empowered by integrated sensing and communication (ISAC) technologies, 6G Perceptive Mobile Network (PMN) is expected to offer ubiquitous sensing capability, leveraging the communications infrastructure. Bi-static sensing can bypass the stringent full-duplex requirement in mono-static sensing and is more practical for (near-term) implementation. Clock asynchronism, which naturally exists between spatially separated communication nodes, is a central and challenging problem in bi-static sensing. It can cause ranging ambiguity and prevent coherent processing of (discontinuous) measurements (e.g., for Doppler frequency estimation). Should it be resolved, sensing can be efficiently realised in communication networks, requiring little network infrastructure and hardware changes.

This talk delves into advanced techniques for addressing the clock asynchronism challenge in the integration, with a particular focus on efficient solutions requiring only a single receiver. First, this issue will be introduced in the context of 6G perceptive mobile networks. Following this, a comprehensive review will be provided for the latest single-receiver-based solutions, applicable to both multi-antenna and single-antenna configurations. Additionally, I will showcase our cutting-edge sensing applications developed using these techniques, including moving object tracking, localization, and environmental sensing including rainfall and water level detection. The talk concludes by highlighting unresolved challenges and exploring future research directions in this evolving field.

Biography: Dr J. Andrew Zhang (M’04-SM’11) is a Professor in the School of Electrical and Data Engineering, University of Technology Sydney, Australia. His research interests are in the area of signal processing for wireless communications and sensing. Prof. Zhang has published more than 300 papers in leading Journals and conference proceedings, and has won 7 best paper awards, including the prestigious 2024 IEEE SPS Donald G. Fink Overview Paper Award. He is a recipient of CSIRO Chairman’s Medal and the Australian Engineering Innovation Award in 2012 for exceptional research achievements in multi-gigabit wireless communications.

Prof. Zhang is one of the pioneer researchers in integrated sensing and communications (ISAC). He initiated the concept of perceptive mobile network, by defining its system framework and demonstrating its feasibility in a set of papers back in 2017. He has since published 60+ ISAC journal papers, including two highly cited papers, and played a foundational role in shaping global ISAC research. His work has been widely cited (7500+ citations on Google Scholar since 2020, mostly on ISAC) and has influenced 6G ISAC standardisation efforts. He has led or contributed to eight ISAC-related projects, securing over $7.5 million in competitive funding. He co-established a joint Network Sensing Lab with TPG, the third-largest mobile operator in Australia, focusing on real-world deployment of ISAC technology in mobile networks. Prof. Zhang co-organized a number of ISAC workshops at leading conferences and special issues in leading IEEE journals. He has delivered ISAC tutorials in WCNC 2021, ICC 2021, ICC 2022, and IEEE Radar 2024, and numerous keynotes and invited talks. For details of his ISAC research, please refer to https://sites.google.com/view/andrewzhang/.

Keynote #4 AI with Attentive Intelligence (AI²) – Enabling Physical Monitoring without Physical Boundaries

Massimo Alioto
National University of Singapore

Abstract: Next-generation AI will be predictive, proactive and agentic, anticipating needs and necessary actions based on context rather than waiting for instructions. This requires tight cooperation of sensing and intelligence, and a hence new generation of sensory intelligence at the edge for always-on monitoring (e.g., surveillance, assistive technologies, security). Indeed, it is now well understood that highly-distributed AI outside the cloud is a necessity in view of the infeasibility of raw data transmission to the cloud, latency challenges, data deluge and network bottleneck, high consumption of continuous wireless streaming, and privacy sensitivities.

As a remarkable convergence, highly-distributed AI will also help address the daunting challenge posed by the ludicrously high levels of power consumption that next-generation datacenters are expected to require. In this talk, intriguing trends and brand new technologies from our Green IC group at NUS are illustrated to show how (incredibly) pervasive AI can be, while simultaneously addressing environmental and energy sustainability challenges. Several enabling silicon chip technologies for sensory intelligence and AI will be discussed, sharing the latest disruptive innovation in applications such as monitoring, surveillance, security and context awareness. Everywhere and continuously, with no physical boundaries.

Biography: Massimo Alioto is Provost’s Chair Professor at the ECE Department of the National University of Singapore, where he leads the Green IC group, the Integrated Circuits and Embedded Systems area, and the FD-fAbrICS center on intelligent&connected systems. Previously, he held positions at the University of Siena, Intel Labs – CRL (2013), University of Michigan - Ann Arbor (2011-2012), University of California – Berkeley (2009-2011), EPFL - Lausanne.

He is (co)author of 400 publications on journals and conference proceedings, and four books with Springer (with two more coming). His primary research interests include ultra-low power and self-powered systems, green computing, circuits for machine intelligence, hardware security, and emerging technologies.

He was the Editor in Chief of the IEEE Transactions on VLSI Systems and Deputy Editor in Chief of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems. He was the Chair of the Distinguished Lecturer Program for the IEEE CAS Society, and was a Distinguished Lecturer for the SSC and CAS Society. Previously, Prof. Alioto was the Chair of the “VLSI Systems and Applications” Technical Committee of the IEEE Circuits and Systems Society (2010-2012). He served as Guest Editor of numerous journal special issues (JSSC, TCAS-I, JETCAS…), Technical Program Chair of several IEEE conferences (ISCAS, SOCC, PRIME, ICECS), and TPC member (ISSCC, ASSCC). His research group contribution has been recognized through various best paper awards (e.g., ISSCC), and in the ten technological highlights of the TSMC annual report, among the others. Prof. Alioto is an IEEE Fellow.